Patents
Mois Navon is one of the founding engineers of Mobileye, where he designed the EyeQ family of SoC (System On a Chip) – the award-winning chip powering the autonomous vehicle revolution. He is the author of numerous hardware patents in the field of image processing and computing hardware. Prior to Mobileye, Mois worked for notable companies such as IBM and NASA’s JPL as well as a number of Israeli Start-Ups. Mois began his career by completing a combined major of Computer Science and Electrical Engineering at the University of California at Los Angeles. This gave him the academic basis to later be involved in all aspects computer design, including chip design, board design, high and low-level software programming as well as systems architecture. Applying these skills, Mois developed a vast array of important applications, including: a Cancer detection machine for the National Institue of Health, a Laser Printer, an ICBM Missile Tracking system for the United States Air Force, a Video-on-Demand (VOD) system for commercial airlines, Video Encryption/Decryption chips for cable and satellite broadcast, an Internet Routers, and chips for Advanced Driver Assist Systems (ADAS) and Autonomous Vehicles. Mois is a recognized technology expert advising startups as well as acting as startup judge for the Mass Challenge international startup accelerator.
Below are his patents in the field.
Watch Mois Navon explain chip design for the layman, focusing on Mobileye’s EyeQ System On A Chip (SoC).
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PART II
Hardware To Support Looping Code In An Image Processing System (US 8892853)
Hardware To Support Looping Code In An Image Processing System (US 8892853) An image processing system including a vector processor
System On Chip Breakpoint Methodology (US 8656221)
System On Chip Breakpoint Methodology (US 8656221) A system-on-chip (SoC) with a debugging methodology. The system-on-chip (SoC) includes a central
Multi-Function Summing Machine (US 8538205)
Multi-Function Summing Machine (US 8538205) A system for processing an image including multiple pixels and intensity data thereof. An image
Enhanced Look-Up Table Signal Processing (US 8300058)
Enhanced Look-Up Table Signal Processing (US 8300058) An electronic device including an array of addressable registers storing data. An input
Gated storage system and synchronization controller and method for multiple multi-threaded processors (EP 2187316)
Gated storage system and synchronization controller and method for multiple multi-threaded processors (EP 2187316) The present invention relates to multi-processing
Cyclical Image Buffer (US 7995067)
Cyclical Image Buffer (US 7995067) A storage buffer attached to an image processor for stereo image processing. The processor compares